The project of the Émeraude team is to contribute to the efficient and easy usage of future generation processors for mobile and embedded applications with a focus on time in all the layers of computation (language, compiler, operating system, virtual machine). The core idea we will develop in our research is that by using timing information, the operating system or middleware will be empowered to make better decisions concerning the power consumption. For example, knowing a deadline and having an estimation of the needed processing power for a task could allow to reduce the operating frequency, and thus reduce energy consumption. Our research contributes to energy aware real-time scheduling on heterogeneous platforms, task and communication mapping on heterogeneous networks-on-chips, and runtime dynamic adaptation to the hardware variability. In addition to this core research direction, we study the possibility to radically change the way we compute by using neuro-inspired accelerators based on emerging memristive nanodevices. To this effect, we collaborate with two teams of the IEMN nanotechnology lab to build a simulator using the characteristics of the devices they design and to research proposals of architectures of hardware neural networks based on these devices.
Placement des taches temps-réels dur sur des architectures multi-coeurs en réseau sur puce
Improving the Reliability of Heterogeneous Multicore Architecture for Intelligent Transportation Systems
Analyse interactive de traces de simulation de réseaux de neurones impulsionnel
Programming adaptive real-time systems
Efficient tree-based symbolic WCET computation
Traitement fiable et à faible consommation énergétique pour les applications de vision par ordinateur appliqués à la voiture autonome sur les processeurs multi-coeurs hétérogène